Director/Sr Manager – SoC Performance Engineering

15 - 20 Years

Job Description

Job Description

Todays complex SOCs have demanding performance goals. Meeting these goals is critical for success of these parts. The performance verification team is responsible to qualify that the design architecture and implementation meets these goals with detailed metrics analysis and cross correlation across model, RTL, emulation.

The job expectations include the following:

The candidate is expected to develop in depth understanding of chip architecture and define/ develop performance verification scenarios to test design/ architecture and report bottlenecks/ optimization opportunities. The test cases should cover system scenarios/ benchmarks which stress target path/ feature as well as subsystem analysis.

The reference metrics to qualify the results needs to be synthesized based on references from system architecture team, IP team, industry standards or defined based on abstract use case descriptions available as part of design requirements.

Establish performance correlation with different levels of abstraction TLM model, RTL and emulation. Also, work with silicon validation to support/ extend the correlation to final silicon.

The SOC system & performance verification work involves close collaboration with IP owners, chip architects, RTL designers and system architect and software teams.

Some of the challenging responsibilities include:

Designing / developing performance tests (including performance benchmarks) with deep understanding how system works for complex advanced SOC components.

Good domain knowledge expertise on ARM interconnects / NOC including cache coherence, DDR controller concepts.

Working with cross domains - IP owners, Systems and Core design teams to achieve performance verification objectives and / or close performance verification loop with SW deliverables

Strong analysis skills to understand results and correlate across metrics to identify design/ architecture issues. This usually involves building on more targeted scenarios with the goal to generate adequate data to understand design architecture behavior under different traffic profiles.

Job Qualifications:

Strong expertise in any of the following domains

o Emulation based performance verification

o UVM or System Verilog based RTL Performance verification.

o System C/TLM based performance verification

C/C++/ Assembly Language Programming skills ARM A/R/M series, PPC

NIC/FlexNOC interconnect with understanding of performance features

Knowledge of Cache coherency /DDR3/LPDDR4/Flash memory subsystem architecture.

AMBA, ACE, AXI bus protocols

Scripting - PERL, Python, UNIX/LINUX

VHDL/Verilog/System Verilog is desired

OVM/UVM Class based verification methodologies is added advantage.

FPGA/Emulation/Prototyping using Palladium/Zebu would be desirable.

Domain knowledge in areas like Graphics/Multimedia/Networking IPs like PCIe, MIPI, GPU, H.264, Ethernet, USB, ITU T.656, DSP, Image/Computer Vision, RADAR processing is added advantage

Salary: Not Disclosed by Recruiter

Industry:Semiconductors / Electronics

Functional Area:Top Management


Employment Type:Permanent Job, Full Time

Key Skills

Desired Candidate Profile

Please refer to the Job description above


UG:B.Tech/B.E. - Any Specialization, Computers, Electrical, Electronics/Telecommunication

PG:M.Tech - Any Specialization, Computers, Electrical, Electronics/Telecommunication

Doctorate:Ph.D - Communication, Computers, Electrical, Electronics/Telecommunication

Company Profile

Connectpro Management Consultants Pvt Ltd.
The Company is a top Notch semicon company.
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Contact Company:Connectpro Management Consultants Pvt Ltd.


Reference Id:Noida